1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device and forming an interlayer dielectric film, and more particularly, to a method for forming an interlayer dielectric film using high-density plasma.
2. Description of the Related Art
As the integration density of semiconductor devices increases, the distance between devices gets narrower. Thus the critical dimensions of the gate of a MOS transistor, which is one of the main constituents for a semiconductor device, become very small. As a result, the distance between gates becomes shorter. Moreover, since self-aligned contacts are made in highly integrated semiconductor devices such as DRAM cells, the height of a gate can be sufficiently increased, but the depth of a gap between gates is comparatively deep compared to the width of the gate. In this regard, it has been a matter of concern to fill a gap between gates with an insulating film.
Borophospho-silicate glass, which has a high flowability at high temperature; has usually been used as an interlayer dielectric film formed between gates, but it cannot be used during a process of fabricating a highly integrated semiconductor device in which a high temperature process is not available. Instead, an interlayer dielectric film formed of high-density plasma has been used in fabricating a semiconductor device. This interlayer dielectric film is obtained by depositing a silicon oxide film to a predetermined thickness by chemical vapor deposition (CVD) using high-density plasma (HDP) after a gate is formed, removing the silicon oxide film through a wet-etching method, and finally, forming a silicon oxide film thereon by the CVD using HDP.
However, when using the interlayer dielectric film formed as described above, voids due to porous defects are easily formed between gates (refer to FIG. 11), which can cause physical cracking around the voids during the subsequent process of forming films such as a bit line, or degradation of the electric device's characteristics, e.g., a short circuit in a gate line, after the completion of a semiconductor device.